The present invention relates to a system for electronically magnifying and expanding a picture, in particular, to a method for controlling the enlargement and expansion suitable for an image pickup system using an image pickup element.
The functions which users demand have been diversified in association with prevailing camcorders. Among these demanded functions, a higher zoom ratio and magnification factor are most prevalent. Products including a zoom lens having a higher magnification factor such as 12 or 16 have been made available. On the other hand, demand for compact and light weight products is strong, as well. However, the above mentioned two demands are not simultaneously satisfied even if a high zoom magnification factor is attempted by providing only a zoom lens. Therefore, so called electronic zooming for electronically magnifying and expanding an image has attracted attention.
In the signal processing for electronic zooming, a video signal which has been interpolated from an original signal representing an image is generated. Various techniques for the interpolation have been proposed. One of them is described in, for example, U.S. Pat. No. 4,774,581. The configuration of the above mentioned prior art is shown in FIG. 1. In the drawing, a reference numeral 73 denotes a memory; 74, an interpolation circuit; 75, a coefficient generating circuit and 76, a memory control circuit. The interpolation circuit 74 generates an interpolation signal (zoom processing signal) S out(m) from two original signals S in(n)+S in(n+1) by an operation as follows: EQU S out(m)=(1-a).times.S in(n)+a.times.S in(n+1) (1)
An additional coefficient "a" and a numeral n are provided for the original signals in formula (1).
In the above mentioned prior art, the electronic zoom magnification factor is represented as .beta./.alpha. and .alpha. is added m times in the coefficient generating circuit 75. At this time .alpha. is successively added. If the result of the addition exceeds .beta., .alpha. is added to a value which is the result of the addition minus .beta. at next addition. In view of implementation of the system with ICs, operation of binary numbers is preferable for the above mentioned addition. Operation wherein the addition result exceeds .beta. can be easily performed using an overflow in an adder. In other words, the operation can be performed by simply successively adding .alpha. if an A-bit adder is used and .beta. is preset to the Ath power of 2.
However, overflows frequently occur in the adder in the vicinity of a magnification factor of 1, which is frequently used, by comparison, since the electronic zoom magnification factor is represented as .beta./.alpha.. This results in an increase in power comsumption. If .alpha. and .beta. are preset to, for example, 8 and 256, respectively, .alpha.=256 when the magnification factor is 1. An overflow occurs whenever addition is performed. When the magnification factor is 2, .alpha.=128. An overflow occurs once per two addition operations. Furthermore, 9-bit data is necessary to preset .alpha. in the range of 1 to 256. Therefore, a most significant bit is only used for presetting 256, resulting in a low wiring efficiency of the system.